1. Field of the Invention
The field of the present invention relates in general to semiconductor processing. More particularly, the field of the invention relates to a method and apparatus for rapid thermal processing of semiconductor substrates, such as silicon wafers.
2. Background
High temperature processing of silicon wafers is important for manufacturing modern microelectronics devices. Such processes, including silicide formation, implant anneals, oxidation, diffusion drive-in and chemical vapor deposition (CVD), may be performed at temperatures ranging from about 400xc2x0 C. to 1200xc2x0 C. in either multi-wafer batch furnaces or in single-wafer rapid thermal processors. However, both of these methods of wafer processing may suffer from several serious shortcomings.
A traditional batch furnace typically heats a horizontal or vertical stack of from 25 to 300 wafers by radiation from the hot walls of a cylindrical cavity. The cavity walls may be heated by electrical elements that can be axially segmented, wherein each segment is individually controlled to help maintain prescribed wafer temperatures along the entire furnace length, thereby minimizing axial variations in processing conditions. However, problems may be encountered with these furnaces for some processes, such as inability to limit time-at-temperature, inconsistent wafer-to-wafer temperature uniformity, and radial temperature variations when heating or cooling a stack of wafers. Radial gradients may arise due to preferential heating or cooling of wafer edges by radiative exchange with the furnace walls, such that the edge temperature leads or lags the center temperature during thermal transients.
Radial temperature variations in batch furnaces can lead to two serious problems: lack of uniformity in thermally activated processes; and thermal stresses which, if excessive, will result in plastic deformations commonly referred to as bow, warpage or slip. These problems can be reduced or avoided by limiting both temperature ramp rates and the speeds at which wafers are pushed into or pulled from the furnace. Inter-wafer spacing can also be increased to permit higher ramp rates and higher push and pull speeds for the same radial temperature variations. With either of these approaches, however, radial temperature uniformity is obtained at the expense of decreased furnace throughput and/or increased process time.
Many modem microelectronics circuits require feature sizes smaller than 1 xcexcm and junction depths less than a few hundred angstroms. In order to limit both the lateral and downward diffusion of dopants, it is desirable to reduce the duration of high temperature processing. One approach for reducing processing time uses a small-batch fast-ramp furnace which achieves faster processing by increasing the wafer spacing and, hence, by reducing both the batch size and the throughput of an otherwise conventional batch furnace. Another approach uses a single-wafer rapid thermal processor (xe2x80x9cRTPxe2x80x9d).
A typical single wafer RTP uses high intensity lamps, optical temperature sensors and sophisticated control algorithms to heat a single semiconductor wafer at a very high temperature ramp rate, thereby reducing the problem of unwanted dopant diffusion. The wafer is generally heated to temperatures of approximately 450xc2x0 C. to 1400xc2x0 C. and may be rapidly cooled after processing. Because an entire surface of the semiconductor wafer can be exposed to the heating source and to any CVD reactant gases, problems associated with radial energy and chemical species transport inherent in batch furnace processing may be reduced or eliminated. Further, process times may be reduced, while maintaining wafer throughput comparable to that of a batch furnace. This reduced process time reduces the time-at-temperature, permitting smaller feature sizes.
Nonetheless, problems may be encountered with the use of high intensity lamps as a heat source, particularly for larger diameter wafers. In particular, it may be difficult to maintain a uniform temperature across a wafer. Not only do temperature differences arise during heating and cooling transients, as in traditional batch furnaces, but non-uniformities may also persist during processing. The interior walls of typical lamp based RTP systems are usually relatively cool and are not heated to a uniform equilibrium process temperature as in a conventional batch furnace. Different radial locations on the wafer surface receive different fractions of their incident radiation from each of the lamps and have different views of the relatively cool side walls. As a result, it may be extremely difficult to ensure that the net radiant heat flux, and hence the equilibrium temperature, will be the same at all points on the wafer. To this end, lamp based systems typically use some combination of optical guides, lenses, and/or reflectors to more evenly distribute radiant energy onto the wafer. In spite of these measures, it may be necessary in some systems to actively cycle individual lamps or groups of lamps on and off at different intervals to compensate for unintended non-uniformities of the radiant energy distribution. These non-uniformities may be difficult to predict. It may be necessary to dynamically detect temperature non-uniformities and actively adjust heating during processing. This, in turn, may require complex temperature measurement systems using radiation from the wafer, but this has dependencies on wafer emissivity. These difficulties are generally avoided in typical batch furnaces because the wafers are placed in a substantially isothermal enclosure and eventually reach temperature equilibrium with the enclosure, regardless of the wafers"" optical properties. Additional problems may be encountered in some lamp based systems due to aging and degradation of lamps and other components. As a result, it may be difficult to maintain repeatable performance and frequent replacement of parts may be necessary.
Non-lamp RTP systems have been developed which are intended to overcome some of the problems encountered with conventional lamp based systems. In one system, a vertical semiconductor wafer processing furnace is axially divided into two zones which are maintained at differing, but steady, temperatures by separately controlled resistance heaters. The wafer temperature and ramp rates during heating and cooling are controlled by translating the wafer along the furnace axis, thereby changing the geometric view factors which determine the relative amounts of radiation received by the wafer from the hotter and colder zones. Other systems use a heated plate for heating the wafer. The wafer may be moved away from the plate on pins prior to removal from the furnace. At least one system has been proposed where the wafer is moved adjacent to a heat sink for cooling prior to removal from the furnace. Typically, non-lamp RTP systems move the wafer through a transitional heat zone and/or actively cool the wafer before removal. Since these furnaces generally are not isothermal, it is difficult to guarantee uniform wafer temperature unless the wafer is positioned well within an isothermal zone. In addition, requiring a separate cooling step may decrease throughput, increase the reactor size and/or increase heat losses and power consumption. On the other hand, if a wafer is inserted and removed in a conventional manner from a heated furnace cavity at very high temperatures without a transitional heat zone or cooling, plastic deformation may result (particularly if the wafer is repetitively exposed to such stresses over multiple process steps). 300 mm and larger diameter wafers are particularly susceptible to such plastic deformation.
What is desired is a semiconductor processing system and method that can accommodate large semiconductor substrates while maintaining a highly reproducible and uniform substrate processing temperature.
What is also desired is a system and method for processing semiconductor substrates at high temperatures with reduced potential for plastic deformation. Preferably, such a system and method would allow for a substrate to be removed from a heated furnace at high temperatures while maintaining a high throughput.
One aspect of the present invention provides an improved system and method for thermal processing of a semiconductor substrate with reduced potential for plastic deformation. In one embodiment, a semiconductor substrate is inserted into a heated cavity for thermal processing. After processing, the semiconductor substrate is rapidly withdrawn from the heated cavity. High speeds of insertion and withdrawal are used to reduce temperature differences across the substrate as it enters and is removed from the heated processing environment, thereby reducing or eliminating one cause of plastic deformation which might otherwise occur. For instance, in an exemplary embodiment, the substrate withdrawal speed may range from about 0.3 to 2.5 or more meters per second, or any range subsumed therein. The desired speed may be selected based on, among other things, substrate temperature, substrate diameter and thickness, cost and complexity of required robotics, and tolerable level and length of defects. For instance, higher speeds may be selected for substantially defect-free processing of larger substrates (e.g., 300 mm or larger) at high temperatures (e.g., in excess of 1000xc2x0 C.). It is an advantage of these and other aspects of the present invention that semiconductor substrates may be thermally processed at high temperatures with high throughput.
Another aspect of the present invention provides for intermediate insertion and withdrawal speeds to be used for applications where short, point-like defects at the edge of the substrate may be acceptable. It is an advantage of this and other aspects of the present invention that unacceptably large defects may be avoided without requiring unduly high speeds of insertion and withdrawal. A simpler wafer transport system may be used than in some high speed embodiments for larger wafers, because the wafers may be held in place by friction rather than requiring a more complex holder.
Another aspect of the present invention provides for high speed withdrawal to be used in combination with a transitional heat zone or cooling zone for removing a substrate from a heated cavity. By using higher than normal withdrawal speeds, the size of transitional heat zones and/or the degree of cooling may be reduced relative to that which would otherwise be required to reduce or avoid plastic deformation.
Another aspect of the present invention provides for an improved furnace for thermal processing of semiconductor substrates. One exemplary embodiment provides both temperature stability and temperature uniformity similar to that of a conventional batch furnace, as well as processing speeds and reduced time-at-temperature similar to that of a rapid thermal processor (which may be necessary to produce the small feature sizes required by many modern microelectronics circuit designs). In such an embodiment, a semiconductor substrate is rapidly inserted into and withdrawn from a heated cavity maintained at a relatively constant and substantially uniform temperature. Rapid insertion of the wafer and its rapid withdrawal at the conclusion of processing serves to minimize the temperature differences between the leading and trailing edges of the substrate as it enters and leaves the furnace, thereby minimizing thermal stress and reducing or preventing the occurrence of plastic deformation (i.e., bow, warpage and slip). This aspect of the present invention reduces or prevents stress damage while also reducing the overall time-at-temperature. This is in contrast to conventional batch furnaces where a low speed of insertion and withdrawal is used to avoid excessive radial temperature differences. In addition, in contrast to single wafer RTP systems which use cold walls or temperature zones, embodiments of the present invention which use a substantially isothermal furnace provide relatively simple temperature control with a high level of uniformity.
Additional aspects of the present invention provide for substrate carriers which reduce heat losses from the perimeter of a semiconductor substrate after heating and allow the substrate to be rapidly removed from a furnace at elevated temperatures. In addition to thermal stress resulting from the temperature difference between the leading and trailing edges during insertion and withdrawal of a semiconductor substrate from a heated cavity, preferential heating or cooling at the perimeter of a semiconductor substrate can also be a significant source of thermal stress. In exemplary embodiments of the present invention, a substrate carrier, slip ring or other thermal shield may be used to protect the perimeter of the substrate from excess radiative heat transfer. Such thermal shielding may be provided as a part of a substrate carrier for high speed insertion and withdrawal. It is an advantage of these and other aspects of the present invention that thermal stress from both preferential heating or cooling at the perimeter of a semiconductor substrate and from inserting and withdrawing a semiconductor substrate from a heated cavity may be controlled to reduce or eliminate plastic deformation.